M00017606
New product
DESIGN AND VERIFICATION OF LOW-POWER INTEGRATED CIRCUITS
British Standards Institution
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Availability date: 11/05/2021
1. Overview<br>2. Normative references<br>3. Definitions, acronyms, and abbreviations<br>4. UPF concepts<br>5. Language basics<br>6. Power intent commands<br>7. Power management cell commands<br>8. UPF processing<br>9. Simulation semantics<br>Annex A (informative) - Bibliography<br>Annex B (normative) - HDL package UPF<br>Annex C (normative) - Queries<br>Annex D (informative) - Replacing deprecated and legacy<br> commands and options<br>Annex E (informative) - Low-power design methodology<br>Annex F (normative) - Value conversion tables<br>Annex G (normative) - Supporting hard IP<br>Annex H (normative) - UPF power-management commands semantics<br> and Liberty mappings<br>Annex I (informative) - Power-management cell modeling examples<br>Annex J (informative) - Switching Activity Interchange Format<br>Annex K (informative) - IEEE List of Participants
Composes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP).
Published | |
Document Type | Standard |
Status | Current |
Publisher | British Standards Institution |
Pages | |
ISBN | |
Committee | EPL/501 |