Table of Contents

Intellectual Property Rights
Foreword
1 Scope
2 References
3 Definitions and abbreviations
4 Frequency accuracy
5 Noise generation
  5.1 Wander
  5.2 Jitter
6 Phase discontinuity
7 Degradation of the performance of a PRC
8 Interfaces
Bibliography
History

Abstract

Standardises SDH timing distribution architectures, synchronisation network level jitter and wander requirements, slave clock timing specifications and primary reference clock specifications.

General Product Information

Published
Document Type	Standard
Status	Current
Publisher	European Telecommunications Standards Institute
Pages
ISBN
Committee	TM 3