M00031529
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DESIGN AND VERIFICATION OF LOW-POWER INTEGRATED CIRCUITS
International Electrotechnical Committee
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Availability date: 11/05/2021
1. Overview
2. Normative references
3. Definitions, acronyms, and abbreviations
4. UPF concepts
5. Language basics
6. Power intent commands
7. Power management cell commands
8. UPF processing
9. Simulation semantics
Annex A (informative) - Bibliography
Annex B (normative) - HDL package UPF
Annex C (normative) - Queries
Annex D (informative) - Replacing deprecated and legacy
commands and options
Annex E (informative) - Low-power design methodology
Annex F (normative) - Value conversion tables
Annex G (normative) - Supporting hard IP
Annex H (normative) - UPF power-management commands semantics
and Liberty mappings
Annex I (informative) - Power-management cell modeling examples
Annex J (informative) - Switching Activity Interchange Format
Annex K (informative) - IEEE List of Participants
Composes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP).
Published | |
Document Type | Standard |
Status | Current |
Publisher | International Electrotechnical Committee |
Pages | |
ISBN | |
Committee | TC 91 |