Cart
0
Product
Products
(empty)
No products
To be determined
Shipping
$0.00
Total
Product successfully added to your shopping cart
Quantity
Total
There are 0 items in your cart.
There is 1 item in your cart.
Total products
Total shipping
To be determined
Total
New
Reduced price!
View larger
View larger
IEEE 1450.6.2 : 2014
M00022208
New product
IEEE 1450.6.2 : 2014
MEMORY MODELING IN CORE TEST LANGUAGE (CTL)
Institute of Electrical & Electronics Engineers
In stock
More info
Table of Contents
1 Overview
2 Normative references
3 Definitions, acronyms, and abbreviations
4 Extensions to IEEE Std 1450.6-2005
5 MemoryRepairblock
6 MemoryPhysicalOrganizationblock
7 Memory CTL Orientation and Capabilities Tutorial
Abstract
Specifies language constructs sufficient to represent the context of a memory core and of the integration of that memory core into an SoC.
General Product Information
| Document Type | Standard |
| Status | Current |
| Publisher | Institute of Electrical & Electronics Engineers |